What’s Provided?

Theseus Cores

  • FPGA source code
  • Software to run with Gnuradio and RFNoC
  • Unit tests and examples to confirm software builds and FPGA testbenches run

Theseus Docker

  • Provides docker images for UHD, gnuradio, and Vivado continuous integration testing, rebuilt weekly for stable branches
  • Images published to Theseus Cores Docker Hub

Theseus UHD Builder

  • Helps build the RFNoC images by tagging compatible versions of theseus-cores and UHD FPGA source code

Channelizer Generation Tool.

   |  Phil Vallance

This is a brief tutorial of the companion Channelizer Verilog Generation Tool that can be found here . The purpose of the tool is to allow a user to peform the following optimizations. Specify channelizer parameters: Maximum number of channels. Taps per phase. Channelizer type (standard M or oversampled M/2 based channelizer Specify 6 dB cut-off frequency and transition bandwidths relative to channel/bin width. Optimize initial filter. [Read More]

RFNoC Deinterleaving Polyphase Channelizer

   |  EJ Kreinar

With the Theseus Cores v1.1.0 release, we now support a highly requested feature for the polyphase channelizer: FPGA-based channel selection and deinterleaving. While I wont go into too much detail on the M/2 polyphase filter bank (PFB) FPGA implementation, I’d like to cover some of the more advanced RFNoC and GNU Radio tricks used here. To use the PFB deinterleaving channelizer in GNURadio, we’ve set up the block interface such that the user specifies 1) the total number of equally-spaced channels, and 2) the channel indices to return to software. [Read More]

Introducing Theseus Cores

   |  EJ Kreinar

I’m very happy to announce the (very modest) release of the Theseus Cores project. Theseus Cores is designed to provide open source FPGA cores for digital signal processing and software defined radio, plus the means to USE the FPGA cores in real life…. In practice, that mostly means FPGA code propagates up through RFNoC blocks which have both UHD and Gnuradio software hooks for users to attach to. In the future it would be great to support other FPGA platforms if there’s interest too. [Read More]