https://theseus-cores.com/ Recent content on Theseus Cores Hugo -- gohugo.io info@theseus-cores.com (EJ Kreinar) info@theseus-cores.com (EJ Kreinar) Sun, 24 Jan 2021 00:00:00 +0000 https://theseus-cores.com/post/2021-01-24-chan-gen-tool/ Sun, 24 Jan 2021 00:00:00 +0000 info@theseus-cores.com (EJ Kreinar) https://theseus-cores.com/post/2021-01-24-chan-gen-tool/ This is a brief tutorial of the companion Channelizer Verilog Generation Tool that can be found here . The purpose of the tool is to allow a user to peform the following optimizations. Specify channelizer parameters: Maximum number of channels. Taps per phase. Channelizer type (standard M or oversampled M/2 based channelizer Specify 6 dB cut-off frequency and transition bandwidths relative to channel/bin width. Optimize initial filter. https://theseus-cores.com/post/2019-12-17-deinterleaving-polyphase-channelizer/ Tue, 17 Dec 2019 00:00:00 +0000 info@theseus-cores.com (EJ Kreinar) https://theseus-cores.com/post/2019-12-17-deinterleaving-polyphase-channelizer/ With the Theseus Cores v1.1.0 release, we now support a highly requested feature for the polyphase channelizer: FPGA-based channel selection and deinterleaving. While I wont go into too much detail on the M/2 polyphase filter bank (PFB) FPGA implementation, I’d like to cover some of the more advanced RFNoC and GNU Radio tricks used here. To use the PFB deinterleaving channelizer in GNURadio, we’ve set up the block interface such that the user specifies 1) the total number of equally-spaced channels, and 2) the channel indices to return to software. https://theseus-cores.com/post/2019-06-02-introducing-theseus-cores/ Sun, 02 Jun 2019 00:00:00 +0000 info@theseus-cores.com (EJ Kreinar) https://theseus-cores.com/post/2019-06-02-introducing-theseus-cores/ I’m very happy to announce the (very modest) release of the Theseus Cores project. Theseus Cores is designed to provide open source FPGA cores for digital signal processing and software defined radio, plus the means to USE the FPGA cores in real life…. In practice, that mostly means FPGA code propagates up through RFNoC blocks which have both UHD and Gnuradio software hooks for users to attach to. In the future it would be great to support other FPGA platforms if there’s interest too. https://theseus-cores.com/page/about/ Mon, 01 Jan 0001 00:00:00 +0000 info@theseus-cores.com (EJ Kreinar) https://theseus-cores.com/page/about/ We started Theseus Cores because we noticed the FPGA world has a profound lack of open-source answers to common DSP questions, including… How do I channelize spectrum? How do I change sample rates? How should I modulate data? … etc Many of these questions have been solved for over 30 years in common signal processing textbooks! But not in a way that users can run, test, and build for hardware.